CPE 315
Professor Stearns
fall 2004
Laboratory #7
Formal lab deliverable due Friday, Nov. 19 by 5:00 p.m.
This lab counts as 6 labs.

1. This is a partnership assignment.
   You may do the work and submit the lab with one other person if you wish.
2. All submission and plagiarism rules are in effect for the remainder of the work.
3. There are no R grades on this lab. If your lab doesn't work, the highest possible grade is 59.

makefile

Test #1 machine code test file and .asm file

Description:

1. Build a simulation of Fig. 5.24
   Your simulation must support the following instructions
       add, addi, sub, addu, and, or, slt, sltu, lw, sw, beq, j, lui

2. You must use the builtin SIM/Xilinx modules as appropriate:
   e.g. Adder, Register, Register File, ROM, RAM, Mux

3. You must provide a way to examine the contents of any desired register.
   SIM: add Read Register 3 with input from switches.
   Xilinx (not required): modify your Register File so you can see a specified register.
   

4. Control and ALU control
   It is recommended that you use a ROM for both controls
   

   SIM: the api file contains an example on how to hardcode a ROM
   Xilinx: it is possible, in VHDL, to initialize a ROM with hardcoded values
   

   You must create these two controls as two separate modules.
   You are not allowed to increase the size of ALUop; keep it as 2 bits.
   

5. Shifters
   You may not use any logic to implement the Shift left 2 operations.
   

6. Race condition
   Fig. 5.24 has an inherent race condition: the fetch is done at the same time as the Register File write-back.
   You must design a circuit that eliminates this race condition.
   KISS solution: fetch on the rising edge of the clock and write-back on the trailing edge.
   

7. Input to the simulation
   SIM: instructions from Instruction memory
   Xilinx: instructions from Instruction memory or complete instructions as input to simulation.
   

1. A formal, professional lab submission.
2. Professional source code (will have large impact on lab grade)
   
   1. include all files whether you wrote them or not
      
   2. sort listings by file name (.h followed by .c for each file)
   3. code meets coding standards, especially overview standards
3. Appropriate screen prints that prove the testfile program is working.
   You must include, at a minimum, the screen prints designated on the .asm version of the testfile.
   Each screen print must include the PC, the instruction, Read data 3 and the appropriate register.
4. Highlights and annotations on each screen print illustrating correct execution.