CPE 315
Winter 2008
Professor Stearns
Laboratory Project #1 - MIPS ALU
Due Wednesday, Jan. 23 at 3:00 p.m. in the CSC drop box
Demoes in Lab on Jan. 22 (if you're wise) and Jan. 24

Notes:
  1. You may do this lab by yourself or with one partner
  2. You are expected to write professional quality code; see syllabus for coding rules.
SIM Resources:
  1. 8 bit adder
  2. Lab #1 makefile
    You are writing oneBitalu.c, alu.c and lab1.c
  3. Mux example
    It is strongly suggested that you build and use the mux example.

Objectives:
  1. To learn how to build an ALU
  2. To learn how to construct a SIM module.

Description:
The objective of this lab is to build and test an 8-bit ALU.
Later in the quarter, we will add more functionality to this ALU and convert it to 32 bits.
  1. Design the ALU
    You are to build the one-bit ALUs shown in Figure B.5.10 of our textbook.
    The complete 8 bit ALU uses seven of the top circuits + one of the bottom circuits.

    Use fullAdd.h, fullAdd.c and fullAddTest.c as examples and templates for your one bit alu (oneBitalu.h, oneBitalu.c, 1bitTest.c)

    It is strongly suggested that you test your one bit alus separately; there is a makefile command to build this test.

    make 1bitTest

  2. 8 bit ALU
    When your 1 bit alus are working, combine them into an 8 bit alu.
    The 8 bit alu must be designed as a module.

  3. ALU as a module
    Use the 8 bit adder files as templates for your 8 bit alu.
    Do NOT try to create source files from scratch; modify the templates as appropriate.
    8bitAdd.h is a template for alu.h
    8bitAddd.c is a template for alu.c
    8bitAddTest.c is a template for lab1.c

  4. lab1.c instantiates and tests your ALU; label each of your switches and probes clearly.
    There are 2 sets of 8-bit input switches (A, B)
    There are 5 other switches (Ainvert, Binvert, Operation 1 , Operation 0 , CarryIn 0
    There are 10 output probes (Result, CarryOut 7 , V)

    Use the following keys for the switches:
    A: 7-0
    B: Shift 7-0
    Ainvert: i
    Binvert: j
    Operation: op
    CarryIn 0 : c

    Note: you can ignore the set output and the less input; they will be used much later. Ground the less input to your Mux with the constant Zero

  5. Demo the ALU to Professor Stearns
    Suggestion: make a truth table for your ALU before the demo; ensure that all input permutations (there are lots of Don't Cares) work properly.

Deliverables
  1. A formal lab report as described in the syllabus.
    You need not include test cases; this work will be demoed in lab.
  2. A demonstration of the ALU


Last updated on 1/17/08