/* fetchTest.c  

   Driver for lab exercise #4  fetch circuit.

   Written by:  Dan Stearns
   CPE 315
   Summer 2006 

   Modifications:

   Note:  to operate this circuit press the keys as shown
   
          c    to initialize PC
          r    to turn off initialization
          c    to generate each successive clock

*/

#include <loadRom.h>
#include <Sim.h>

#include "clockUnit.h"
#include "fetch.h"

// number of instructions in romfile
#define NUM_INST 16

//  Stores instructions in 4K memory; see Fig. 5.5 on page 345
unsigned char instructionMemory[4096];

//  width of buses in fetch circuit
#define busWidth 32

void simnet() {
 Sig(clock,1);
 Sig(startRun,1);
 Signal PC(busWidth, "PC");
 Sig(NextPC,busWidth);
 Signal Instruction(busWidth, "Instruction");

 // load program into instruction memory
 loadRom (instructionMemory, NUM_INST*4, "romfile.exe4");

 clockUnit("2a", startRun, clock);

 fetch( "2b",
        //inputs:
        startRun,
        One, 
        clock,

        //outputs:
        NextPC,
        PC,
        Instruction
	);

 int parts[]={4};

 Probe("1c-3c",PC, 1, parts );
 Probe("1d-3d",Instruction, 1, parts );
}