CPE 315 Final Examination Announcement
Professor Stearns
Winter 2008

The final exam will be held on Tuesday, Mar. 18 from 4:10 - 7:00 pm in our regular classroom.

The final examination will cover the course lectures, homework problems, assigned material from the course textbook, and material from the laboratory projects.
Note: we have not covered Chapter 4 material.

The final exam is closed book but you may bring one 8 1/2 x 11 sheet of paper (both sides) with notes in your own handwriting.
No printed material or copied material may be used except handouts or figures from our textbook.
Calculators may not be used.

In addition, you may be provided the following figures from the textbook as appropriate:
Figures B.5.10, B.5.12, B.9.3, 5.12, 5.13, 5.24, 5.28, 5.30, 5.39, 7.9, 7.17, 7.21 and the official MIPS instruction sheet

Important Notes

1. Be sure all numbers are normalized to the appropriate units.

2. Be sure to comment any code according to the submission rules #5 and #6.
   Code that lacks good quality logical comments will automatically receive a grade of 0.

3. On essay questions, don't use words on the bad words list .
   

4. There will be a strong emphasis on exceptions, virtual memory, caches and Lab Projects #4, #5, #6.
   

To do well on the examination, you should be able to:

1. Do signed/unsigned addition and subtraction. Ensure you are able to calculate and interpret the overflow and carry bits correctly.
2. Do any of the homework problems or problems similar to homework problems.
3. Design (parts of) Control and ALUControl for Figure 5.24 extensions (e.g. a new instruction).
   
4. Show the design changes, both data path and control, necessary to add an instruction to Figures 5.39 and 5.30.
   Expect the design problem to include Control and ALU Control changes.
   Be prepared to expand Figure 5.30 for the new instruction.
   
5. For an extant instruction, determine the values on the data path and control path in Figure 5.39
6. Answer conceptual and practical questions about the course laboratories.
   Questions will emphasize the later labs including Fig. 5.28 details, MIPS programming, context switching, exceptions, system calls, and virtual memory.
7. Understand and write MIPS programs using native instructions only.
   
8. Understand, explain and code SPIM memory-mapped I/O.
   
9. Discuss/explain/answer homework (and related) questions from "Soul of a New Machine"
   Questions will be limited to technical material only; don't worry about people and culture issues.
   
10. Be able to explain or apply the significant concepts covered in CPE 315: a sample list follows:
    

Why do computers use binary numbers?
Why do we humans use hexadecimal numbers?
What is two's complement? (note: it's a noun, not a verb)
Why do ALUs use two's complement? Explain.
What are some alternatives to two's complement? Explain.
What operations can the MIPS ALU perform? (e.g. A+B, A-B, ...)
Why does the alu perform subtraction?
How does the alu perform subtraction?

What does it mean to say: n-bit machine? What parts of the CPU determine n?
What does it mean to say: n-bit program?
How is the address space of a computer defined? How could it be changed?
What determines the maximum address of a computer?
What determines the maximum memory size of a computer?
Why are CPUs designed in layers (e.g. hardware, microcode, machine code, C++)
Why don't we build CPUs that interpret C++?
What is the purpose of microcode? machine code? assembly language?
Why are some CPUs microprogrammable? Why not all CPUs?
Why are computers constructed with memory hierarchies?
Why are emulators used in a computer system? Why are emulators usually faster than the native CPU?
Why are simulators used to interpret instruction set architectures?
Why are are simulators always slower than the native CPU?

What are the major differences between a RISC and CISC machine?
What are the advantages of a RISC machine?
What are the advantages of a CISC machine?
What are the characteristics of a RISC machine?
What are the characteristics of a CISC machine?

Address Space

What determines the address space of a program?
What parts of the CPU determine its address space? (Think carefully!)
Why do computer designers build CPUs with an address space smaller than physical memory? (e.g. SUN SPARC)
Why do computer designers build CPUs with an address space larger than physical memory? (e.g. MIPS)
Suppose you were asked to determine the address space of a computer; how would you proceed?

Why are CPUs microprogrammed?   microprogrammable?   hard-wired?

What are the motivations for using caches?
Explain the rationale for each type of cache (direct mapped, set associative, fully associative)
What's the purpose of a translation lookaside buffer?
Under what circumstances should a cache use write-through? write-back?
Explain locality, both temporal and spatial. Use/discuss actual code examples

Virtual Memory

Explain how virtual memory is used to help solve each of the following architecture problems.

1. Multiple programs executing in the same CPU
2. Accessing memory addresses larger than 2 ^{largest address}
3. Executing a program with only part of it in memory
4. Executing a program larger than memory
5. Program sharing
6. Protection

In addition to the MMU, what features must be provided by the CPU to implement virtual memory?

1. A MIPS programming problem; write a function given its specification.
2. Problems to convert MIPS assembly/pseudo instructions to binary and vice-versa.
   
3. A question about simulators, emulators, language translators, interpreters
4. Detailed design question about slt instructions.
   
5. A design problem: add a new instruction to Fig. 5-39
6. Questions about MIPS exception handling. (reference to Lab #5)
7. Virtual memory questions.
   
8. Cache problems (essay and problems similar to the homework)
   
9. Short answer essay questions from (or related to) the list above.

1. Writing MIPS microcode; be sure you can read it.
   
2. Specific questions about SIM or Xilinx
   But there may be lots of questions about the concepts learned while doing the labs.