Home page:http://www.cis.njit.edu/franz E-mail:franz@cis.njit.edu
| Homework | Task
| Deadline | Points | Student
Name:
| 8 | Memory Management
| Nov. 18 | 10 |
|
Effective Memory Access Time
In the paging memory management scheme, the system performance greatly
depends on the use of associative registers or translation-look-aside
buffers (TLBs) and their hit ratios. Compute the effective access
times for the situations given below, based on 70 ns memory access
time and 5 ns TLB access time.
| single-level paging, | 80 % hit ratio |
| single-level paging, | 95 % hit ratio |
| four-level paging, | 80 % hit ratio |
| four-level paging, | 99 % hit ratio |
| | |
| | |
| | |
In order to have a performance loss of less than 15 %, what hit ratio
do we have to achieve with
| one-level paging | |
| | |
| four-level paging | |
| | |
CIS 332 Principles of Operating Systems Fall 1997 Franz Kurfess.