Cover details of spec validation that weren't fully covered in Section 2.2. As with Section 2.3, there may not be anything to cover in this section.

Whether or not this section expands further, here's the current thinking on the detection of specification problems:

Validity of Inputs and Outputs	Precondition      Value	Postcondition       Value	Problem
One or more input values is known to be invalid.	true	don't care	The precondition is too weak, or has flawed logic.
All input and output values are known to be valid.	true	false	The postcondition logic is flawed.
All input values are known to be valid, but one or more output values are known to be invalid. This condition is provided as a challenge to the postcondition logic.	true	true	The postcondition logic is flawed.

The third entry in the table seems like it might be kind of interesting, in that it I don't recall it having been discussed in the testing literature I've read. The idea is that we provide test cases that are a deliberate challenge to the output of the function under test. If it is an interesting idea, it's doubtless been discussed somewhere, I just don't remember seeing it.