Overview & Description

A page fault is an event caused by a process or thread accessing a virtual memory page that is not mapped into physical memory. These page faults typically cause a system trap to resolve the fault by reading pages from disk and mapping them into physical memory. These sorts of faults are the source of significant overhead, and inherently degrades the performance of a program.

Distributed shared memory (DSM) systems that maintain a global address space are particularly vulnerable to degraded performance in an environment where pages accesses frequently fault. This vulnerability is amplified when one considers the time required to resolve page faults over a network connection. In a typical DSM system, there are also many concurrent processes that access a global address space where each virtual page is mapped to one physical machine's address space. These access patterns can be especially difficult to follow without some sort of visual aid!

Figure 1: Visualization of memory accesses per address. This mode lends itself for quick identification of the regions of memory that are being used comparatively more than others. It acts as a starting point for investigating poor performance.

This is a contrived example using generated data to emphasize what the different modes are for. The vertical interference graph demonstrates which processes of eight accessed a page. If a process access a page, the color for that process is filled in for its interval. You can also see which pages faulted the most, compared to the other pages. The red bars indicate that the page faulted comparatively more than the others. The points indicate what actual addresses were accessed more frequently, typical of lock variables and array bases. In this image, there is only one address that was accessed more than once, indicated by the orange point.

Figure 2: Visualization of faulting process interference graphs make it easier to detect what processes are accessing and faulting on certain pages.

Figure 3: The figures shown above were synthesized from this original set of data, which is considerably more cluttered and more difficult to interpret. This is the default mode displayed by the visualizer, but the individual components of the graph can be toggled on/off by the viewer.

Controls

i - toggle individual addresses
o - toggle interference graph
p - toggle pages

Data File & Future Work

The data file is a newline delimited list of (process id -> address accessed). This information isn't easy to provide with system-provided allocators, but is very easy to add to third-party allocators like Hoard or Google's malloc. For testing, a binary has been provided to generate visualization data.
This visualizer is being integrated into my thesis project with Dr. Bellardo to build a distributed shared memory system in user-space.

Source code available at: final.tar.gz